SH7205 Datasheet, PDF (1190/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name Value
R/W Description
9

Undefined R
Reserved
Undefined value is read from this bit. The write value
should always be 0.
8
BIGEND
0
R/W FIFO Port Endian Control
Specifies the byte endian for the CFIFO port.
0: Little endian
1: Big endian
7, 6

Undefined R
Reserved
Undefined values are read from these bits. The write
value should always be 0.
5
ISEL
0
R/W FIFO Port Access Direction When DCP is Selected
0: Reading from the buffer memory is selected
1: Writing to the buffer memory is selected
After writing to this bit with the DCP being a selected
pipe, read this bit to check that the written value
agrees with the read value before proceeding to the
next process.
Even if an attempt is made to modify the setting of
this bit during access to the FIFO buffer, the current
access setting is retained until the access is
completed. Then, the modification becomes effective
thus enabling continuous access.
Set this bit and the CURPIPE bits simultaneously.
4

Undefined R
Reserved
Undefined value is read from this bit. The write value
should always be 0.
Rev. 1.00 Mar. 25, 2008 Page 1158 of 1868
REJ09B0372-0100