SH7205 Datasheet, PDF (1423/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
Address: 0000_0000
Address: xxx0_0000 (Start)
Address: XXX0_0002
Address: XXX0_0004
.......
Address: XXX0_03BE
Address: XXX0_03C0
.......
Address: xxx3_6D7E (Last)
Address: xxx3_6D80 (Start)
.......
.......
.......
.......
.......
.......
Address: xxx6_DAFE (Last)
.......
.......
.......
Address: xx10_00C0 (Start)
.......
1st line (pixel 1) in plane A
1st line (pixel 2) in plane A
1st line (pixel 3) in plane A
.......
1st line (pixel 480) in plane A
2nd line (pixel 1) in plane A
.......
234th line (pixel 480) in plane A
1st line (pixel 1) in plane B
.......
.......
.......
.......
.......
.......
234th line (pixel 480) in plane B
.......
.......
.......
1st line (pixel 1) in plane C
.......
Other areas
Plane A area
Plane B area
Other areas
Plane C area
Address: 0200_0000
Other areas
Figure 26.5 Relations between the Planes and Display-Line Pitch
in Memory for the αRGB444 (16 Bits) Pixel Format
As shown in figure 26.5, the start address for each of planes A, B, and C is a 64-byte boundary.
The readout area from each planes can be set to desired start address and area. However, the
access unit is restricted by the byte number per pixel. For example, when the αRGB444 format
has been set, access is in 2-byte units and only access to even addresses is allowed, access to odd
addresses is prohibited.
Rev. 1.00 Mar. 25, 2008 Page 1391 of 1868
REJ09B0372-0100