SH7205 Datasheet, PDF (1367/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
26.3.2 Mixing Function Setting Register for Graphics (GR_MIXPLY)
The register GR_MIXPLY specifies the display of externally input pictures and graphics. The
register value is applied to the 2DG in synchronization with the VSYNC signal.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
- EXTEN -
-
- OUTEN
Initial value: -
-
-
-
-
-
-
-
-
-
-
0
-
-
-
0
R/W: R
R
R
R
R
R
R
R
R
R
R R/W R
R
R R/W
Bit
Bit name
31 to 5 
4
EXTEN
3 to 1 
0
OUTEN
Initial
Value
R/W
Undefined R
0
R/W
Undefined R
0
R/W
Description
Reserved
The read value is undefined. The write value should
always be 0.
Display Enable Bit for Externally Input Pictures
This bit enables or disables the display of externally
input pictures.
0: Disabled
1: Enabled
Reserved
The read value is undefined. The write value should
always be 0.
Graphics Display Enable
This bit enables or disables the graphics display.
0: Disabled
1: Enabled
Rev. 1.00 Mar. 25, 2008 Page 1335 of 1868
REJ09B0372-0100