SH7205 Datasheet, PDF (1173/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
24.3.5 Device State Control Register 0 (DVSTCTR0)
DVSTCTR0 is a register that controls and confirms the state of the USB data bus of PORT0.
This register is initialized by a power-on reset. Only the WKUP bit is initialized by a USB bus
reset.
Bit: 15 14 13 12 11 10
—
—
—
—
—
—
Initial value: -
-
-
-
-
-
R/W: R
R
R
R
R
R
9
8
7
6
5
4
3
— WKUP RWUPE USBRSTRESUME UACT —
-
0
0
0
0
0
-
R R/W R/W R/W R/W R/W R
2
1
0
RHST[2:0]
0
0
0
RRR
Bit
Bit Name
15 to 9 
8
WKUP
Initial
Value
R/W
Undefined R
0
R/W
Description
Reserved
Undefined values are read from these bits. The write
value should always be 0.
Wakeup Output
When the function controller function is selected,
setting this bit to 1 enables output of the remote
wakeup signal to the USB bus on PORT0.
The module controls the output time of a remote
wakeup signal. When this bit is set to 1, this module
clears this bit to 0 after outputting the 10-ms K state.
According to the USB specification, the USB bus idle
state must be kept for 5 ms or longer before a
remote wakeup signal is output. If this module writes
1 to this bit right after detection of suspended state,
the K state will be output after 2 ms.
0: Remote wakeup signal is not output.
1: Remote wakeup signal is output.
Note: Do not write 1 to this bit, unless the device
state is in the suspended state (the DVSQ bit in
the INTSTS0 register is set to 1xx) and the
USB host enables the remote wakeup signal.
When this bit is set to 1, the USB clock must
not be stopped even in the suspended state
(write 1 to this bit while SCKE is 1).
Rev. 1.00 Mar. 25, 2008 Page 1141 of 1868
REJ09B0372-0100