SH7205 Datasheet, PDF (1361/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 26 2D Graphics Engine (2DG)
26.2 Input/Output Pins
Table 26.1 Pin Configuration
Name
External HSYNC input
External VSYNC input
External clock input
External data input
External enable input
External clock input
CSYNC output pin
Display data R output
Display data G output
Display data B output
External reference
External capacitor
Pin
VIHSYNC
VIVSYNC
VICLK
VIDATA[7:0]
VICLKENB
DCLKIN
CSYNC
R
G
B
REXT
CBU
In/Out
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Input
Output
Description
HSYNC signal input from a video decoder
VSYNC signal input from a video decoder
Clock signal input from a video decoder
Data signal input from a video decoder
Enable signal from a video decoder
Clock signal input for RGB display
Composite SYNC output signal for RGB
display
Analog R signal output for RGB display
Analog G signal output for RGB display
Analog B signal output for RGB display
Control signal for analog output amplitude
Phase compensation signal for the
internal amplifier
Rev. 1.00 Mar. 25, 2008 Page 1329 of 1868
REJ09B0372-0100