SH7205 Datasheet, PDF (1117/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 23 AND/NAND Flash Memory Controller (FLCTL)
23.3.7 Data Register (FLDATAR)
FLDATAR is a 32-bit readable/writable register. It stores input/output data used when 0 is written
to the CDSRC bit in FLCMDCR in command access mode. FLDATAR cannot be used for
reading or writing of five or more bytes of contiguous data.
Bit: 31
Initial value: 0
R/W: R/W
30
0
R/W
29
0
R/W
28 27
DT4[7:0]
0
0
R/W R/W
26
0
R/W
25
0
R/W
24
0
R/W
23
0
R/W
22
0
R/W
21
0
R/W
20 19
DT3[7:0]
0
0
R/W R/W
18
0
R/W
17
0
R/W
16
0
R/W
Bit: 15
Initial value: 0
R/W: R/W
14
0
R/W
13
0
R/W
12 11
DT2[7:0]
0
0
R/W R/W
10
0
R/W
9
0
R/W
8
0
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
3
DT1[7:0]
0
0
R/W R/W
2
0
R/W
1
0
R/W
0
0
R/W
Initial
Bit
Bit Name Value R/W Description
31 to 24 DT4[7:0] H'00
R/W Fourth Data
Specify the 4th data to be input or output via the NAF7
to NAF0 pins.
In write: Specify write data
In read: Store read data
23 to 16 DT3[7:0] H'00
R/W Third Data
Specify the 3rd data to be input or output via the NAF7
to NAF0 pins.
In write: Specify write data
In read: Store read data
15 to 8 DT2[7:0] H'00
R/W Second Data
Specify the 2nd data to be input or output via the NAF7
to NAF0 pins.
In write: Specify write data
In read: Store read data
7 to 0 DT1[7:0] H'00
R/W First Data
Specify the 1st data to be input or output via the NAF7
to NAF0 pins.
In write: Specify write data
In read: Store read data
Rev. 1.00 Mar. 25, 2008 Page 1085 of 1868
REJ09B0372-0100