SH7205 Datasheet, PDF (1356/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 25 AT Attachment Packet Interface (ATAPI)
(2) Transfer to and from memory via enhanced bus by interrupt
Start
Same as for process (a)
Write 1 to iERR and iNEND bits
in interrupt enable register
Write following values to bits 8 to 0
in ATAPI control register:
00m110101 for ATAPI device read
00m110001 for ATAPI device write
Note: Set m to the same value as the M/S bit.
Same as for process (c)
End
Figure 25.9 Transfer to and from Memory via Enhanced Bus by Interrupt
Rev. 1.00 Mar. 25, 2008 Page 1324 of 1868
REJ09B0372-0100