SH7205 Datasheet, PDF (1595/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 30 Power-Down Modes
30.2.22 CPU0/CPU1 Mode Status Registers (C0MSR, C1MSR)
C0MSR and C1MSR are 8-bit read-only registers that indicate current operating mode of
respective processors. Writing to these registers is ignored.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
-
- SLEEP
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
• C0MSR
Initial
Bit Bit Name Value R/W Description
7 to 1 
All 0 R Reserved
These bits are always read as 0.
0
SLEEP 0
R CPU0 Status
0: CPU0 is in normal operating mode (CPU0 clock supplied).
1: CPU0 is in sleep mode (CPU0 clock halted).
• C1MSR
Initial
Bit Bit Name Value R/W Description
7 to 1 
All 0 R Reserved
These bits are always read as 0.
0
SLEEP 0
R CPU1 Status
0: CPU1 is in normal operating mode (CPU1 clock supplied).
1: CPU1 is in sleep mode (CPU1 clock halted).
Rev. 1.00 Mar. 25, 2008 Page 1563 of 1868
REJ09B0372-0100