SH7205 Datasheet, PDF (1607/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

The CKIO pin continues to output the internal clock.
Section 30 Power-Down Modes
30.3.6 Software Standby Mode Application Example
This example describes a transition to software standby mode on the falling edge of the NMI
signal and the cancellation of software standby mode on the rising edge of the NMI signal. The
timing is shown in figure 30.2.
When the NMI pin is changed from high to low level while the NMI edge select bit (NMIE) in the
interrupt control register (ICR) is set to 0 (falling edge detection), the NMI interrupt is accepted.
When the NMIE bit is set to 1 (rising edge detection) by the NMI exception service routine, and
then the SLEEP instruction is executed with the STBY bit set to 1 and the DEEP bit set to 0 in
STBCR1, the LSI enters software standby mode. Thereafter, when the NMI pin is changed from
low to high level, software standby mode is canceled.
Oscillator
CKIO
NMI pin
NMIE bit
STBY bit
LSI state
Program
execution
NMI
exception
handling
Exception
service routine
Software
standby mode
Oscillation
settling time
NMI exception
handling
Figure 30.2 NMI Timing in Software Standby Mode (Application Example)
Rev. 1.00 Mar. 25, 2008 Page 1575 of 1868
REJ09B0372-0100