SH7205 Datasheet, PDF (457/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 11 Direct Memory Access Controller (DMAC)
11.4.2 DMA Transfer Conditions
Three DMA transfer conditions are available: unit operand transfer, sequential operand transfer,
and non-stop transfer. These conditions can be selected by using the DMA transfer condition
select bits (DSEL) of DMA control register A (DMCNTAn). Each DMA transfer condition is
described below. Table 11.9 lists DMA transfer conditions, which are illustrated in figure 11.4.
(1) Unit Operand Transfer
Setting the DMA transfer condition select bits (DSEL) to 00 selects unit operand transfer.
A single DMA request transfers data by the amount specified in the single operand transfer data
count select bits (OPSEL) of the DMA mode register (DMMODn).
Each time a DMA transfer request is made, the DMAC repeats single operand transfer and ends
single DMA transfer when the byte count reaches 0.
(2) Sequential Operand Transfer
Setting the DMA transfer condition select bits (DSEL) to 01 selects sequential operand transfer.
A single DMA request transfers data in units of the number of data items set in the single operand
transfer data count select bits (OPSEL) (single operand transfer). This data transfer is continued
till a single DMA transfer ends (i.e., till the byte count reaches 0). Channel arbitration is
performed each time the single operand transfer ends. Data transfer on the current channel is
automatically continued if there is no DMA request from a higher-priority channel.
(3) Non-Stop Transfer
Setting the DMA transfer condition select bits (DSEL) to 11 selects non-stop transfer.
A single DMA request continuously transfers data till a single DMA transfer ends (i.e., till the
byte count reaches 0). During this interval, DMA requests from higher-priority channels are not
accepted because channel arbitration is not performed.
In non-stop transfer, the settings of the single operand transfer data count select bits (OPSEL) are
invalid and setting of two-dimensional addressing is prohibited.
Rev. 1.00 Mar. 25, 2008 Page 425 of 1868
REJ09B0372-0100