SH7205 Datasheet, PDF (1193/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 24 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value R/W Description
14
REW
0
R/W* Buffer Pointer Rewind
Set this bit to 1 to rewind the buffer pointer.
When the selected pipe is in the receiving direction,
setting this bit to 1 while the FIFO buffer is being
read allows re-reading the FIFO buffer from the first
data (in double buffer mode, re-reading the currently-
read FIFO buffer plane from the first data is allowed).
0: The buffer pointer is not rewound.
1: The buffer pointer is rewound.
Note: Do not set REW to 1 simultaneously with
modifying the CURPIPE bits. Before setting
REW to 1, ensure that FRDY is 1.
When accessing DnFIFO with the BFRE bit set
to 1, do not set this bit to 1 after the short
packet data has been all read out.
To re-write to the FIFO buffer from the first data
for the pipe in the transmitting direction, use
the BCLR bit.
13
DCLRM
0
R/W Auto Buffer Memory Clear after Reading Data from
Specified Pipe
Enables or disables the buffer memory to be cleared
automatically after data has been read out using the
selected pipe.
With this bit set to 1, this module sets BCLR to 1 for
the FIFO buffer of the selected pipe on receiving a
zero-length packet while the FIFO buffer assigned to
the selected pipe is empty, or on receiving a short
packet and reading the data while BFRE is 1.
0: Auto buffer clear mode is disabled.
1: Auto buffer clear mode is enabled.
Note: When the BRDYM bit set to 1, always set this
bit to 0.
Rev. 1.00 Mar. 25, 2008 Page 1161 of 1868
REJ09B0372-0100