SH7205 Datasheet, PDF (297/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Bus State Controller (BSC)
10.2 Input/Output Pins
Table 10.1 shows the pin configuration of the BSC.
Table 10.1 Pin Configuration
Pin Name
A25 to A0
D31 to D0
CS5 to CS0
RD
RD_WR/WE
WE3/BC3/DQM3
WE2/BC2/DQM2
I/O
Output
I/O
Output
Output
Output
Output
Output
Function
Address bus
Data bus
Chip select
Read pulse signal (read data output enable signal)
Read or write signal
• Indicates either read or write access when a normal space is
accessed in byte-write strobe access mode (RD_WR).
• Connects to the WE pin of a byte-select SRAM when a normal
space is accessed in one-write strobe mode (WE).
Controls access via D31 to D24.
• Enables writing to the data area corresponding to D31 to D24
when a normal space is accessed in byte-write strobe mode
(WE3).
• Connects to the byte select pin of a byte-select SRAM when a
normal space is accessed in one-write strobe mode (BC3).
• Controls access to SDRAM if it is connected (DQM3).
Controls access via D23 to D16.
• Enables writing to the data area corresponding to D23 to D16
when a normal space is accessed in byte-write strobe mode
(WE2).
• Connects to the byte select pin of a byte-select SRAM when a
normal space is accessed in one-write strobe mode (BC2).
• Controls access to SDRAM if it is connected (DQM2).
Rev. 1.00 Mar. 25, 2008 Page 265 of 1868
REJ09B0372-0100