SH7205 Datasheet, PDF (367/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Bus State Controller (BSC)
1. Before transitioning to self-refresh mode, disable any DMA channel transfers that
access the SDRAM area of the channel.
2. If programs are to be executed during transition to self-refresh mode, in self-refresh
mode, or during recovery from self-refresh mode, design them in such a way that they
will not include operands accessing or fetching (including pre-fetching) instructions
stored in the SDRAM area.
(c) Procedure for Transition to and Recovery from Deep-Power-Down Mode
Figure 10.27 shows the procedure for transitioning to deep-power-down mode.
Access enabled state:
Operation enabled (EXENB in SDCmCNT = 1)
Disable access:
(1) Disable any DMA access to the channel area of interest
Keep CPU from accessing SDRAM area
(2) Disable access to the channel of interest (EXENB = 0) by
a program placed in other than the channel area of interest
(3) Make sure that EXENB has been cleared to 0
End auto-refreshing:
Clear DRFEN bit in SDRFCNT1 to 0
Start deep-power-down mode:
(1) Make surethat all status bits in SDSTR have been cleared to 0
(2) Set deep-power-down enable bit (DDPD) to 1 by
a program placed in other than the channel area of interest
Deep-power-down mode
Figure 10.27 Procedure for Transition to Deep-Power-Down Mode
Rev. 1.00 Mar. 25, 2008 Page 335 of 1868
REJ09B0372-0100