SH7205 Datasheet, PDF (1590/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 30 Power-Down Modes
30.2.15 System Control Register 8 (SYSCR8)
SYSCR8 is an 8-bit readable/writable register that enables or disables writing from CPU0 to each
page of the high-speed on-chip RAM1. Other descriptions on this register are the same as
SYSCR2.
Note: When writing to this register, see section 30.4, Usage Notes.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
-
RAM RAM
WE1 WE0
Initial value: 1
1
1
1
1
1
1
1
R/W: R R R R R R R/W R/W
Initial
Bit
Bit Name Value R/W Description
7 to 2 
All 1 R
Reserved
These bits are always read as 1. The write value should
always be 1.
1
RAMWE1 1
R/W RAM Write Enable 1 (page 1 of high-speed on-chip RAM1*)
0: Write to page 1 is disabled.
1: Write to page 1 is enabled.
0
RAMWE0 1
R/W RAM Write Enable 0 (page 0 of high-speed on-chip RAM1*)
0: Write to page 0 is disabled.
1: Write to page 0 is enabled.
Note: * For the addresses of each page, see section 29, On-Chip RAM.
Rev. 1.00 Mar. 25, 2008 Page 1558 of 1868
REJ09B0372-0100