SH7205 Datasheet, PDF (132/1904 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 3 Floating-Point Unit (FPU)
3.3.3 Floating-Point Communication Register (FPUL)
Information is transferred between the FPU and CPU via FPUL. FPUL is a 32-bit system register
that is accessed from the CPU side by means of LDS and STS instructions. For example, to
convert the integer stored in general register R1 to a single-precision floating-point number, the
processing flow is as follows:
R1 → (LDS instruction) → FPUL → (single-precision FLOAT instruction) → FR1
Rev. 1.00 Mar. 25, 2008 Page 100 of 1868
REJ09B0372-0100