SH7764 Datasheet, PDF (916/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 21 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value R/W Description
12
DTCH
0
R/W*¹ USB Disconnection Detection Interrupt Status
Indicates the status of the USB disconnection
detection interrupt when the host controller function
is selected.
0: DTCH interrupts not generated
1: DTCH interrupts generated
This module detects the DTCH interrupt on detecting
USB bus disconnection, and sets this bit to 1. Here, if
software has set the corresponding interrupt enable
bit to 1, this module generates the interrupt. This
module detects bus disconnection based on USB
Specification 2.0.
After detecting the DTCH interrupt, this module
controls hardware as described below (irrespective
of the set value of the corresponding interrupt enable
bit). Software should terminate all the pipes in which
communications are currently carried out for the USB
port and make a transition to the wait state for bus
connection to the USB port (wait state for ATTCH
interrupt generation).
• Modifies the UACT bit for the port in which a
DTCH interrupt has been detected to 0.
• Puts the port in which a DTCH interrupt has been
generated into the idle state.
When the function controller function is selected, the
read value is invalid.
Rev. 1.00 Nov. 22, 2007 Page 860 of 1692
REJ09B0360-0100