SH7764 Datasheet, PDF (671/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

• Transfer to and from memory via pixel bus by interrupt
Start
Section 17 ATAPI
Same as Process (a)
Write 1 to the iEER and iNEND bits
in the interrupt enable register.
Write the following values to bits 7 to 0
in the ATAPI control register:
0m100101 for ATAPI device read and
0m100001 for ATAPI device write.
Note: Set the same value as the M/S bit to m.
Interrupt occurred?
No
Process (c)
Yes
Write 0 to the iERR and INEND bits
in the interrupt enable register.
Yes
ERR = 0 and NEND = 1
No
Clear ATAPI status register
Clear ATAPI status register
Error processing
End
Figure 17.8 Transfer to and from Memory via Pixel Bus by Interrupt
Rev. 1.00 Nov. 22, 2007 Page 615 of 1692
REJ09B0360-0100