SH7764 Datasheet, PDF (364/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Memory Controller Unit (MCU)
The relationship between the endian mode, device data length, and access unit are shown in tables
11.7 to 11.16.
Table 11.7 32-Bit External Device/Big-Endian Access and Data Alignment (Areas 0 and 3)
Operation
Access
D31 to
Size
Address No. D24
Byte
4n
1 Data
7 to 0
4n + 1 1 
4n + 2 1 
4n + 3 1 
Data Bus
D23 to D15 to
D16 D8


Data
7 to 0



Data
7 to 0

Word 4n
4n + 2
Longword 4n
1 Data Data 
15 to 8 7 to 0
1

Data
15 to 8
1 Data Data Data
31 to 24 23 to 16 15 to 8
Strobe Signal
D7 to D0 WE3 WE2 WE1 WE0

Assert

Assert

Assert
Data
7 to 0

Assert Assert
Assert
Data
7 to 0
Data
7 to 0
Assert Assert
Assert Assert Assert Assert
Table 11.8 16-Bit External Device/Big-Endian Access and Data Alignment (Areas 0 and 3)
Operation
Access
D31 to
Size
Address No. D24
Byte
2n
1
2n + 1 1 
Word 2n
1
Longword 4n
1
4n + 2 2 
Data Bus
D23 to D15 to
D16 D8
D7 to D0 WE3

Data 
7 to 0


Data
7 to 0

Data Data
15 to 8 7 to 0

Data Data
31 to 24 23 to 16

Data Data
15 to 8 7 to 0
Strobe Signal
WE2 WE1 WE0
Assert
Assert
Assert Assert
Assert Assert
Assert Assert
Rev. 1.00 Nov. 22, 2007 Page 308 of 1692
REJ09B0360-0100