SH7764 Datasheet, PDF (1463/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 27 General Purpose I/O (GPIO)
Bit
8
7
6
5
4
3 to 0
Bit Name
PTHIZ_SCI1
PTHIZ_SCI2
PTHIZ_ETH
PTHIZ_VDC2
PTHIZ_USB

Initial Value R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
All 0
R
Description
High-Impedance Control for SCIF Channel 1
Pins
0: Normal state
1: High-impedance state
High-Impedance Control for SCIF Channel 2
Pins
0: Normal state
1: High-impedance state
High-Impedance Control for EtherC Pins
0: Normal state
1: High-impedance state
High-Impedance Control for VDC2 Pins
0: Normal state
1: High-impedance state
High-Impedance Control for USB Pins
0: Normal state
1: High-impedance state
Reserved
These bits are always read as 0. The write
value should always be 0.
27.2.37 HI-Z Register B (PTHIZ_B)
PTHIZ_B is a 16-bit readable/writable register that controls the high-impedance state of the on-
chip module pins.
Bit: 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
PTHIZ PTHIZ PTHIZ PTHIZ PTHIZ PTHIZ
_SSI0 _SSI1 _SSI2 _SSI3 _SSI4 _SSI5
—
—
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R
R
R
R
R
R
R
R
R
R
Rev. 1.00 Nov. 22, 2007 Page 1407 of 1692
REJ09B0360-0100