SH7764 Datasheet, PDF (490/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 13 Interrupt Controller (INTC)
13.3.11 Interrupt Source Register 01 (Mask State is not affected) (INT2A01)
INT2A01 (mask state is not affected) is a 32-bit read-only register that indicates interrupt source
modules. Even if interrupt masking is set in the interrupt mask register, INT2A01 indicates a
source module in a corresponding bit (the corresponding interrupt is not generated). If source
indication is not necessary depending on the state of the interrupt mask register, use INT2A11.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
—
—
—
—
—
— SCIF2 —
—
—
—
— VDC2 — USB EtherC
Initial value: ₀
0
0
0
0
0
—
0
0
0
0
0
—
0
—
—
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
— LCDC —
— IIC
—
SRC SRC
ODFI IDEI
—
Initial value: —
0
0
0
0
0
0
0
—
0
0
—
0
—
—
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Rev. 1.00 Nov. 22, 2007 Page 434 of 1692
REJ09B0360-0100