SH7764 Datasheet, PDF (823/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 20 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Bit
Bit Name
31 to 12 
11
CNDCE
10
DLCCE
9
CDCE
8
TROCE
7
RMAFCE
6, 5

4
RRFCE
Initial
Value
All 0
0
0
0
0
0
All 0
0
R/W Description
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W CND Bit Copy Directive
0: Reflects the CND bit status in the TFS bit of the
transmit descriptor
1: Occurrence of the corresponding source is not
reflected in the TFS bit of the transmit descriptor
R/W DLC Bit Copy Directive
0: Reflects the DLC bit status in the TFE bit of the
transmit descriptor
1: Occurrence of the corresponding source is not
reflected in the TFE bit of the transmit descriptor
R/W CD Bit Copy Directive
0: Reflects the CD bit status in the TFE bit of the
transmit descriptor
1: Occurrence of the corresponding source is not
reflected in the TFE bit of the transmit descriptor
R/W TRO Bit Copy Directive
0: Reflects the TRO bit status in the TFE bit of the
transmit descriptor
1: Occurrence of the corresponding source is not
reflected in the TFE bit of the transmit descriptor
R/W RMAF Bit Copy Directive
0: Reflects the RMAF bit status in the RFE bit of the
receive descriptor
1: Occurrence of the corresponding source is not
reflected in the RFE bit of the receive descriptor
R
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W RRF Bit Copy Directive
0: Reflects the RRF bit status in the RFE bit of the
receive descriptor
1: Occurrence of the corresponding source is not
reflected in the RFE bit of the receive descriptor
Rev. 1.00 Nov. 22, 2007 Page 767 of 1692
REJ09B0360-0100