SH7764 Datasheet, PDF (703/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Bit
6 to 4
Section 18 Serial Sound Interface (SSI)
Initial
Bit Name Value R/W Description
SCKS[2:0] 000
R/W • In SSIDMCOR2:
000: The SSI_CH2 audio clock = AUDIO_CLK2 is
input.
001: Setting prohibited
010: The SSI_CH2 audio clock = AUDIO_CLK3 is
input.
011: The SSI_CH2 audio clock = AUDIO_CLK4 is
input.
100: The SSI_CH2 audio clock = AUDIO_CLK5 is
input.
101: Setting prohibited
110: The SSI_CH2 audio clock = AUDIO_CLK0 is
input.
111: The SSI_CH2 audio clock = AUDIO_CLK1 is
input.
• In SSIDMCOR3:
000: The SSI_CH3 audio clock = AUDIO_CLK3 is
input.
001: The SSI_CH3 audio clock = AUDIO_CLK4 is
input.
010: The SSI_CH3 audio clock = AUDIO_CLK5 is
input.
011: Setting prohibited
100: The SSI_CH3 audio clock = AUDIO_CLK0 is
input.
101: The SSI_CH3 audio clock = AUDIO_CLK1 is
input.
110: The SSI_CH3 audio clock = AUDIO_CLK2 is
input.
111: Setting prohibited
Rev. 1.00 Nov. 22, 2007 Page 647 of 1692
REJ09B0360-0100