SH7764 Datasheet, PDF (1596/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 32 List of Registers
Module
MCU
Register Name
P4 Area
Abbreviation R/W Address
Linear-to-tiled memory LTAM1
address translation area
start address mask
register 1
R/W H'FF80 0128
Linear-to-tiled memory
address translation
control register 2
LTC2
R/W H'FF80 0130
Linear-to-tiled memory LTAD2
address translation area
start address register 2
R/W H'FF80 0138
Linear-to-tiled memory LTAM2
address translation area
start address mask
register 2
R/W H'FF80 0140
Linear-to-tiled memory
address translation
control register 3
LTC3
R/W H'FF80 0148
Linear-to-tiled memory LTAD3
address translation area
start address register 3
R/W H'FF80 0150
Linear-to-tiled memory LTAM3
address translation area
start address mask
register 3
R/W H'FF80 0158
Linear-to-tiled memory
address translation
control register 4
LTC4
R/W H'FF80 0160
Linear-to-tiled memory LTAD4
address translation area
start address register 4
R/W H'FF80 0168
Linear-to-tiled memory LTAM4
address translation area
start address mask
register 4
R/W H'FF80 0170
Linear-to-tiled memory
address translation
control register 5
LTC5
R/W H'FF80 0178
Area 7
Address
Remarks
Access (Initial
Size Value)
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
32
H'0000 0000
0000 0000
Rev. 1.00 Nov. 22, 2007 Page 1540 of 1692
REJ09B0360-0100