SH7764 Datasheet, PDF (381/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Memory Controller Unit (MCU)
Figure 11.10 shows a connection example of SDRAMs with the configuration of 8 Mbytes × 16
bits when the 64-bit external bus is used. Figure 11.11 shows a similar example when the 32-bit
external bus is used.
SH7764
A[14:0]
CLKOUT
CKE
CS1
RAS
CAS
R/W
D63 to D48
DQM64UU
DQM64UL
D47 to D32
DQM64LU
DQM64LL
D31 to D16
DQMUU
DQMUL
D15 to D0
DQMLU
DQMLL
128-Mbit (16-MB)
SDRAM
8M × 16 bits
BA[1:0], A[11:0]
CLK
CKE
CS
RAS
CAS
WE
I/O15 to I/O0
DQMU
DQML
BA[1:0], A[11:0]
CLK
CKE
CS
RAS
CAS
WE
I/O15 to I/O0
DQMU
DQML
BA[1:0], A[11:0]
CLK
CKE
CS
RAS
CAS
WE
I/O15 to I/O0
DQMU
DQML
BA[1:0], A[11:0]
CLK
CKE
CS
RAS
CAS
WE
I/O15 to I/O0
DQMU
DQML
Figure 11.10 Connection Example of Synchronous DRAMs for 64-Bit Data Bus (Area 1)
Rev. 1.00 Nov. 22, 2007 Page 325 of 1692
REJ09B0360-0100