SH7764 Datasheet, PDF (911/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 21 USB 2.0 Host/Function Module (USB)
Initial
Bit
Bit Name
Value R/W Description
9
NRDY
0
R
Buffer Not Ready Interrupt Status
0: NRDY interrupts not generated
1: NRDY interrupts generated
This module sets this bit to 1 when at least one
PIPENRDY bit in NRDYSTS is set to 1 among the
PIPENRDY bits corresponding to the PIPENRDYE
bits in NRDYENB to which 1 has been set (when this
module detects the NRDY interrupt status in at least
one pipe among the pipes for which software
enables the NRDY interrupt output).
For the conditions for PIPENRDY status assertion,
refer to (2) NRDY Interrupts under section 21.4.2,
Interrupt Functions.
This module clears this bit to 0 when software writes
0 to all the PIPENRDY bits corresponding to the
PIPENRDYE bits to which 1 has been set.
This bit cannot be cleared to 0 even if software writes
0 to this bit.
8
BRDY
0
R
Buffer Ready Interrupt Status
Indicates the BRDY interrupt status.
0: BRDY interrupts not generated
1: BRDY interrupts generated
This module sets this bit to 1 when at least one
PIPEBRDY bit in BRDYSTS is set to 1 among the
PIPEBRDY bits corresponding to the PIPEBRDYE
bits in BRDYENB to which 1 has been set (when this
module detects the BRDY interrupt status in at least
one pipe among the pipes for which software
enables the BRDY interrupt output).
For the conditions for PIPEBRDY status assertion,
refer to (1) BRDY Interrupts under section 21.4.2,
Interrupt Functions.
This module clears this bit to 0 when software writes
0 to all the PIPEBRDY bits corresponding to the
PIPEBRDYE bits to which 1 has been set.
This bit cannot be cleared to 0 even if software writes
0 to this bit.
Rev. 1.00 Nov. 22, 2007 Page 855 of 1692
REJ09B0360-0100