SH7764 Datasheet, PDF (525/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 14 Timer Unit (TMU)
Section 14 Timer Unit (TMU)
This LSI includes an on-chip 32-bit timer unit (TMU), which has six channels (channels 0 to 5).
14.1 Features
The TMU has the following features.
• Auto-reload type 32-bit down-counter provided for each channel
• Input capture function provided in channel 2
• Selection of rising edge or falling edge as external clock input edge when external clock is
selected or input capture function is used for each channel
• 32-bit timer constant register for auto-reload use, readable/writable at any time, and 32-bit
down-counter provided for each channel
• Selection of six counter input clocks: Channel 0 to 2
External clock (TCLK) and five peripheral clocks (Pck/4, Pck/16, Pck/64, Pck/256, and
Pck/1024) (Pck is the peripheral clock).
• Selection of five counter input clocks: Channel 3 to 5
Five peripheral clocks (Pck/4, Pck/16, Pck/64, Pck/256, and Pck/1024) (Pck is the peripheral
clock).
• Two interrupt sources
One underflow source (each channel) and one input capture source (channel 2).
Rev. 1.00 Nov. 22, 2007 Page 469 of 1692
REJ09B0360-0100