SH7764 Datasheet, PDF (1125/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

TX
TY
=
TZ
W
=
Section 23 G2D
Parse transformation matrix
Affine transformation matrix
1
0
P02 P03
m00 m01 m02 m03
X
0
1
P12 P13
m10 m11 m12 m13
Y
0
0
P22 P23
m20 m21 m22 m23
Z
0
0
P32 P33
0
0
0
1
1
m00 + P02m20 m01 + P02m21 m02 + P02m22 m03 + P02m23
X
m10 + P12m20 m11 + P12m21 m12 + P12m22 m13 + P12m23
Y
P22m20
P22m21
P22m22
P22m23
Z
P32m20
P32m21
P32m22
P32m23 + P33
1
Here the input vertex Z is 0 and the TZ output is not used, so the synthesized matrix becomes as
follows:
m00 + P02m20 m01 + P02m21
0
m03 + P02m23
m10 + P12m20 m11 + P12m21
0
m13 + P12m23
0
P32m20
0
P32m21
0
0
0
P32m20 + P33
The remaining nine parameters are set to the matrix parameter A to I registers (MTRAR to
MTRIR), which are coordinate transformation control registers.
The relationship between the matrix parameter registers and matrix parameters is shown below.
A
B
0
C
D
E
0
F
0
0
0
0
G
H
0
I
Rev. 1.00 Nov. 22, 2007 Page 1069 of 1692
REJ09B0360-0100