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SH7764 Datasheet, PDF (1097/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Section 22 LCD Controller (LCDC)
4. Packed 1bpp (Pixel Alignment in Byte is Little Endian)
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
MSB
LSB
7 6 5 4 3 2 1 0 [Bit]
P07 P06 P05 P04 P03 P02 P01 P00 (Byte0)
P08 (Byte1)
…
P17 P16 P15 P14 P13 P12 P11 P10
P18
…
Display Memory
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 …
P10 P11 P12 P13 P14 P15 P16 P17 …
…
…
Display
Pn: Put 1-bit data
LAO: Line Address Offset
—Unused bits should be 0
5. Packed 2bpp (Pixel Alignment in Byte is Little Endian)
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
MSB
76
P03
P07
54
P02
P06
32
P01
P05
LSB
1 0 [Bit]
P00 (Byte0)
P04 (Byte1)
…
P13 P12 P11 P10
P17 P16 P15 P14
…
Display Memory
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 …
P10 P11 P12 P13 P14 P15 P16 P17 …
…
…
Display
Pn = Pn[1:0]: Put 2-bit data
LAO: Line Address Offset
—Unused bits should be 0
6. Packed 4bpp (Pixel Alignment in Byte is Little Endian)
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
MSB
LSB
7 6 5 4 3 2 1 0 [Bit]
P01
P00
(Byte0)
P03
P02
(Byte1)
P05
P04
(Byte2)
…
P11
P10
P13
P12
P15
P14
…
Display Memory
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07 …
P10 P11 P12 P13 P14 P15 P16 P17 …
…
…
Display
Pn = Pn[3:0]: Put 4-bit data
LAO: Line Address Offset
—Unused bits should be 0
Rev. 1.00 Nov. 22, 2007 Page 1041 of 1692
REJ09B0360-0100