SH7764 Datasheet, PDF (1270/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 G2D
(3) Matrix Parameter B Register (MTRBR)
Offset:
H'108
Initial Value: Undefined
The matrix parameter B register (MTRBR) is a 32-bit readable/writable register which specifies a
matrix parameter at coordinate change in the single-precision floating-point format defined by the
IEEE 754 standard. However, since internal computation is carried out with 32-bit fixed-point
operations (16-bit integer portion and 16-bit fractional portion), MTRBR should be set within the
range of −2¹⁵ ≤ MTRBR < 2¹⁵.
MTRBR retains its value at a reset.
Note: For details on the setting range, see (2) 4 × 4 Matrix Operation, to (5) Coordinate
Transformation Flow and Saturation Processing, in section 23.1.2, Basic Functions.
(4) Matrix Parameter C Register (MTRCR)
Offset:
H'10C
Initial Value: Undefined
The matrix parameter C register (MTRCR) is a 32-bit readable/writable register which specifies a
matrix parameter at coordinate change in the single-precision floating-point format defined by the
IEEE 754 standard. However, since internal computation is carried out with 32-bit fixed-point
operations (16-bit integer portion and 16-bit fractional portion), MTRCR should be set within the
range of −2¹⁵ ≤ MTRCR < 2¹⁵.
MTRCR retains its value at a reset.
Note: For details on the setting range, see (2) 4 × 4 Matrix Operation, to (5) Coordinate
Transformation Flow and Saturation Processing, in section 23.1.2, Basic Functions.
(5) Matrix Parameter D Register (MTRDR)
Offset:
H'110
Initial Value: Undefined
The matrix parameter D register (MTRDR) is a 32-bit readable/writable register which specifies a
matrix parameter at coordinate change in the single-precision floating-point format defined by the
IEEE 754 standard. However, since internal computation is carried out with 32-bit fixed-point
Rev. 1.00 Nov. 22, 2007 Page 1214 of 1692
REJ09B0360-0100