SH7764 Datasheet, PDF(302/1752 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

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SH7764 Datasheet, PDF (302/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

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Section 10 Clock Pulse Generator (CPG)

A block diagram of the CPG is shown in figure 10.1.

XTAL

EXTAL

Crystal

oscillator

MODE8

DCLKIN

PLL circuit 1

Ã 10

Ã 12

Divider 1

Ã1

Ã 1/3

Ã 1/6

Division circuit 1

Ã1

Ã 1/2

PLL circuit 2

Ã1

Bus clock

(Bck)

CPU clock

(Ick)

SHwy clock

(SHck)

Peripheral clock

(Pck)

Panel source clock

(to VDC2)

CLKOUT

MODE2

MODE1

MODE0

Clock frequency

controller

FRQCR

Clock controller

STBCR

PLLCR

MSTPCR VDC2CLKCR

Bus interface

Peripheral bus

[Legend]

FRQCR:

Frequency control register

STBCR:

Standby control register

MSTPCR: Module stop register

PLLCR:

PLL control register

VDC2CLKCR: VDC2 clock control register

Note: Refer to section 28, Power-Down Mode, for details on STBCR and MSTPCR.

Figure 10.1 Block Diagram of CPG

Rev. 1.00 Nov. 22, 2007 Page 246 of 1692

REJ09B0360-0100

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