SH7764 Datasheet, PDF (1259/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 G2D
(3) Alpha Value Register (ALPHR)
Offset:
H'088
Initial Value: Undefined
The alpha value register (ALPHR) is a 32-bit readable/writable register which specifies the alpha
blending value when the rendering attribute αE bit is set to 1. ALPHR retains its value at a reset.
For blending of the blue and red components, the upper five bits of the alpha value are valid. For
blending of the green component, the upper six bits are valid when the destination pixel format is
RGB and the upper five bits are valid when it is ARGB.
Bit
7 to 0
Bit Name
ALPH
Description
These bits set the alpha value.
Destination ≈ source × ALPH/255 + destination (1 − ALPH/255)
(approximate expression when ALPH is an 8-bit value)
Bits 31 to 8—Reserved: The write value should always be 0. These bits are always read as 0.
(4) Color Offset Register (COFSR)
Offset:
H'08C
Initial Value: Undefined
The color offset register (COFSR) is a 32-bit readable/writable register. In 16-bit/pixel drawing, if
the rendering attribute COOF bit is set to 1, the result of adding the value in COFSR to the value
of the source data (color expanded data for a binary source and the specified color for the
monochrome specification) is drawn. The operation is performed by saturation processing. In 8-
bit/pixel drawing, the rendering attribute COOF bit must be cleared to 0. The offset components
are treated as signed integers. Negative numbers are expressed as two's complement. COFSR
retains its value at a reset.
Rev. 1.00 Nov. 22, 2007 Page 1203 of 1692
REJ09B0360-0100