SH7764 Datasheet, PDF (702/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Serial Sound Interface (SSI)
Bit
6 to 4
Initial
Bit Name Value R/W
SCKS[2:0] 000
R/W
Description
Audio Clock Selection
These bits select the audio clock to be input from
external devices to SSI_CH0 to SSI_CH5.
• In SSIDMCOR0:
000: The SSI_CH0 audio clock = AUDIO_CLK0 is
input.
001: The SSI_CH0 audio clock = AUDIO_CLK1 is
input.
010: The SSI_CH0 audio clock = AUDIO_CLK2 is
input.
011: Setting prohibited
100: The SSI_CH0 audio clock = AUDIO_CLK3 is
input.
101: The SSI_CH0 audio clock = AUDIO_CLK4 is
input.
110: The SSI_CH0 audio clock = AUDIO_CLK5 is
input.
111: Setting prohibited
• In SSIDMCOR1:
000: The SSI_CH1 audio clock = AUDIO_CLK1 is
input.
001: The SSI_CH1 audio clock = AUDIO_CLK2 is
input.
010: Setting prohibited
011: The SSI_CH1 audio clock = AUDIO_CLK3 is
input.
100: The SSI_CH1 audio clock = AUDIO_CLK4 is
input.
101: The SSI_CH1 audio clock = AUDIO_CLK5 is
input.
110: Setting prohibited
111: The SSI_CH1 audio clock = AUDIO_CLK0 is
input.
Rev. 1.00 Nov. 22, 2007 Page 646 of 1692
REJ09B0360-0100