SH7764 Datasheet, PDF (716/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Serial Sound Interface (SSI)
Initial
Bit
Bit Name
Value R/W Description
4
BLKEND0
0
R/W Block Transfer End 0 (3)
(BLKEND3)
Indicates that data transfer whose byte count is
specified by SSIBLCNTSR0 (3) has been completed.
0: Indicates that data transfer whose byte count is
specified by SSIBLCNTSR0 (3) has not been
completed.
1: Indicates that data transfer whose byte count is
specified by SSIBLCNTSR0 (3) has been
completed.
3
BLKNEND0 0
R/W n-Times Block Transfer End 0 (3)
(BLKNEND3)
Indicates that data transfer whose block count is
specified by SSIBLNCNTSR0 (3) has been completed.
0: Indicates that data transfer whose block count is
specified by SSIBLNCNTSR0 (3) has not been
completed.
1: Indicates that data transfer whose block count is
specified by SSIBLNCNTSR0 (3) has been
completed.
2
DMEND0
0
R/W Transfer End 0 (3)
(DMEND3)
Indicates that data transfer whose word count is
specified by SSIRDMCNTR0 (3) or SSIWDMCNTR0 (3)
has been completed.
0: Indicates that data transfer whose word count is
specified by SSIRDMCNTR0 (3) or SSIWDMCNTR0
(3) has not been completed.
1: Indicates that data transfer whose word count is
specified by SSIRDMCNTR0 (3) or SSIWDMCNTR0
(3) has been completed.
1
TXFIFOFUL0 0
R/W Transmit FIFO Full 0 (3)
(TXFIFOFUL3)
Indicates that the transmit FIFO buffer for SSI_CH0
(CH3) is full.
0: Indicates that the transmit FIFO buffer for SSI_CH0
(CH3) is not full.
1: Indicates that the transmit FIFO buffer for SSI_CH0
(CH3) is full.
Rev. 1.00 Nov. 22, 2007 Page 660 of 1692
REJ09B0360-0100