SH7764 Datasheet, PDF (670/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 17 ATAPI
Start
Master drive?
No
Yes
Write 1 to the M/S bit of the ATAPI
control register
Process (a)
Write 0 to the M/S bit in the ATAPI
control register
Start the ATAPI device
Note: Refer to the manual for each device
Write the unified memory address
to the DMA start address register
Write the number of transfers to
the DMA transfer count register
Write the following values to bits 7
to 0 in the ATAPI control register:
0m100101 for ATAPI device read
and 0m100001 for ATAPI device write
Set the same value as the M/S bit to m
ACT=1
Yes
Yes
No
ERR = 0 and NEND = 1
No
Process (b)
Clear ATAPI status register
ATAPI status register
Error processing
End
Figure 17.7 Transfer to and from Memory via Pixel Bus by Polling
Rev. 1.00 Nov. 22, 2007 Page 614 of 1692
REJ09B0360-0100