SH7764 Datasheet, PDF (321/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Memory Controller Unit (MCU)
Address
Register Name
Abbr.
Initial Value
Access
Size
H'FF8001A8
Linear-to-tiled memory address LTC7
translation control register 7
H'0000000000000000 32
H'FF8001B0
Linear-to-tiled memory address LTAD7
translation area start address
register 7
H'0000000000000000 32
H'FF8001B8
Linear-to-tiled memory address LTAM7
translation area start address
mask register 7
H'0000000000000000 32
H'FF800218
Request mask setting register RQM
H'0000000000000000 32
H'FF801000
Bus control register
BCR
H'0000000038000000 32
H'FF802000
CS0 bus control register
CS0BCR H'0000000077777x80 32
H'FF802008
CS0 wait control register
CS0WCR H'000000007777770F 32
H'FF802030
CS3 bus control register
CS3BCR H'0000000077777380 32
H'FF802038
CS3 wait control register
CS3 WCR H'000000007777770F 32
Note: Registers should not be accessed in the size other than the specified access size.
Rev. 1.00 Nov. 22, 2007 Page 265 of 1692
REJ09B0360-0100