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SH7764 Datasheet, PDF (536/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Section 14 Timer Unit (TMU)
Initial
Bit
Bit Name Value R/W Description
2 to 0 TPSC[2:0] 000
R/W Timer Prescaler 2 to 0
These bits select the TCNT count clock.
000: Counts on Pck/4
001: Counts on Pck/16
010: Counts on Pck/64
011: Counts on Pck/256
100: Counts on Pck/1024
101: Setting prohibited
110: Setting prohibited
111: Counts on external clock (TCLK) *3
Notes: X: Don't care
1. Reserved bit in channel 0 or 1 (initial value is 0, and can only be read).
2. Writing 1 does not change the value; the previous value is retained.
3. Do not set in channels 3, 4, and 5.
14.3.6 Input Capture Register 2 (TCPR2)
TCPR2 is a 32-bit read-only register for use with the input capture function, provided only in
channel 2. The input capture function is controlled by means of the ICPE and CKEG bits in TCR2.
When input capture occurs, the TCNT2 value is copied into TCPR2. The value is set in TCPR2
only when the ICPF bit in TCR2 is 0.
BIt: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Initial value: — — — — — — — — — — — — — — — —
R/W: R R R R R R R R R R R R R R R R
BIt: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: — — — — — — — — — — — — — — — —
R/W: R R R R R R R R R R R R R R R R
Rev. 1.00 Nov. 22, 2007 Page 480 of 1692
REJ09B0360-0100