SH7764 Datasheet, PDF (1482/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 29 Watchdog Timer and Reset
Figure 29.1 shows a block diagram of the WDT.
PRESET
Watchdog timer and Reset
Reset control
circuit
Internal reset request
Interrupt
control circuit
WDTCSR
Interrupt request
2
CPG
INTC
WDTOVF
STATUS1
STATUS0
Count-up signal
WDTCNT
WDTBCNT
Comparator
Comparator
WDTST
WDTBST
Peripheral clock
[Legend]
WDTBCNT: Watchdog timer base counter
WDTBST: Watchdog timer base stop time register
WDTCNT: Watchdog timer counter
WDTCSR: Watchdog timer control/status register
WDTST: Watchdog timer stop time register
Figure 29.1 Block Diagram
Rev. 1.00 Nov. 22, 2007 Page 1426 of 1692
REJ09B0360-0100