SH7764 Datasheet, PDF (1434/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 27 General Purpose I/O (GPIO)
27.2.21 Input-Pin Pull-Up Control Register (PTPUL_SPCL)
PTPUL_SPCL is a 16-bit readable/writable register that individually controls the pull-up for the
pin corresponding to each bit.
Bit: 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0

PTPUL_ PTPUL_
IRQ1 IRQ0













Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R
R
R
R
R
R
R
R
R
R
R
R
R
Bit
15
14
13
12 to 0
Bit Name

PTPUL_IRQ1
PTPUL_IRQ0

Initial Value R/W
0
R
0
R/W
0
R/W
All 0
R
Description
Reserved
This bit is always read as 0. The write value
should always be 0.
Controls pull-up of the IRQ1 pin.
0: IRQ1 pin pull-up off
1: IRQ1 pin pull-up on
Controls pull-up of the IRQ0 pin.
0: IRQ0 pin pull-up off
1: IRQ0 pin pull-up on
Reserved
These bits are always read as 0. The write
value should always be 0.
Rev. 1.00 Nov. 22, 2007 Page 1378 of 1692
REJ09B0360-0100