SH7764 Datasheet, PDF (462/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 12 Direct Memory Access Controller (DMAC)
12.5 Usage Notes
Pay attentions to the following notes when the DMAC is used.
12.5.1 Module Stop
While DMAC is in operation, modules should not be stopped by setting MSTPCR (transition to
the module standby state). When modules are stopped, transfer contents cannot be guaranteed.
12.5.2 Address Error
When a DMA address error is occurred, after execute the following procedure, and then start a
transfer.
1. Dummy read for the below listed registers.
BCR (MCU)
INTCB3 (INTC)
IL memory
EESR (EtherC)
INTSTS0 (USB)
2. Issue the SYNCO instruction.
3. Set registers of all channels again.
If the AE bit in DMAOR is set to 1, channels 0 to 5 should be set again.
12.5.3 Notes on Burst Mode Transfer
During a burst mode transfer, following operation should not be executed until the transfer of
corresponding channel has completed.
• Transition to sleep mode should not be made.
• Modules should not be stopped by setting the CPG register.
Rev. 1.00 Nov. 22, 2007 Page 406 of 1692
REJ09B0360-0100