SH7764 Datasheet, PDF (1534/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 31 User Debugging Interface (H-UDI)
ASEBRKAK/BRKACK
Break controller
Boundary-scan
TAP controller
Interrupt/reset etc
TCK
TMS
TRST
SDBSR
SDBPR
TAP controller
Decoder
TDI
TDO
SDIR
SDINT
[Legend]
SDBPR:
SDBSR:
SDINT:
SDIR:
Bypass register
Boundary scan register
Interrupt source register
Instruction register
Figure 31.1 H-UDI Block Diagram
Rev. 1.00 Nov. 22, 2007 Page 1478 of 1692
REJ09B0360-0100