SH7764 Datasheet, PDF (357/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Memory Controller Unit (MCU)
11.4.15 CS3 Bus Control Register (CS3BCR)
Bit: 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48

Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R R R R R R R R R R
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IWW[2:0]

IWRWD[2:0]

IWRWS[2:0]

IWRRD[2:0]
Initial value: 0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0

IWRRS[2:0]

SZ[1:0] RDSPL       
Initial value: 0
1
1
1
0
0
1
1
1
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R R/W R/W R/W R R R R R R R
Initial
Bit
Bit Name Value R/W
63 to 31 
All 0 R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 1.00 Nov. 22, 2007 Page 301 of 1692
REJ09B0360-0100