SH7764 Datasheet, PDF (744/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 18 Serial Sound Interface (SSI)
In figure 18.9, system word length of 6 bits and a data word length of 4 bits are used. Neither of
these are possible with SSI_CH0 to SSI_CH5 but are used only for clarification of the other
configuration bits.
• Inverted Clock
As basic sample format configuration except SCKP = 1
SSISCK
SSIWS
1st Channel
2nd Channel
SSIDATA TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31
• Inverted Word Select
Figure 18.10 Inverted Clock
As basic sample format configuration except SWSP = 1
SSISCK
SSIWS
1st Channel
2nd Channel
SSIDATA TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31 TD30 TD29 TD28 0 0 TD31
Figure 18.11 Inverted Word Select
• Inverted Padding Polarity
As basic sample format configuration except SPDP = 1
SSISCK
SSIWS
1st Channel
2nd Channel
SSIDATA TD28 1 1 TD31 TD30 TD29 TD28 1 1 TD31 TD30 TD29 TD28 1 1 TD31
Figure 18.12 Inverted Padding Polarity
Rev. 1.00 Nov. 22, 2007 Page 688 of 1692
REJ09B0360-0100