SH7764 Datasheet, PDF (1272/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 23 G2D
(8) Matrix Parameter G Register (MTRGR)
Offset:
H'11C
Initial Value: Undefined
The matrix parameter G register (MTRGR) is a 32-bit readable/writable register which specifies a
matrix parameter at coordinate change in the single-precision floating-point format defined by the
IEEE 754 standard. However, since internal computation is carried out with 32-bit fixed-point
operations (16-bit integer portion and 16-bit fractional portion), MTRGR should be set within the
range of −2¹⁵ ≤ MTRGR < 2¹⁵.
MTRGR retains its value at a reset.
Note: For details on the setting range, see (2) 4 × 4 Matrix Operation, to (5) Coordinate
Transformation Flow and Saturation Processing, in section 23.1.2, Basic Functions.
(9) Matrix Parameter H Register (MTRHR)
Offset:
H'120
Initial Value: Undefined
The matrix parameter H register (MTRHR) is a 32-bit readable/writable register which specifies a
matrix parameter at coordinate change in the single-precision floating-point format defined by the
IEEE 754 standard. However, since internal computation is carried out with 32-bit fixed-point
operations (16-bit integer portion and 16-bit fractional portion), MTRHR should be set within the
range of −2¹⁵ ≤ MTRHR < 2¹⁵.
MTRHR retains its value at a reset.
Note: For details on the setting range, see (2) 4 × 4 Matrix Operation, to (5) Coordinate
Transformation Flow and Saturation Processing, in section 23.1.2, Basic Functions.
(10) Matrix Parameter I Register (MTRIR)
Offset:
H'124
Initial Value: Undefined
The matrix parameter I register (MTRIR) is a 32-bit readable/writable register which specifies a
matrix parameter at coordinate change in the single-precision floating-point format defined by the
IEEE 754 standard. However, since internal computation is carried out with 32-bit fixed-point
Rev. 1.00 Nov. 22, 2007 Page 1216 of 1692
REJ09B0360-0100