SH7764 Datasheet, PDF (1729/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Appendix
BGA
ball no. Pin Name
Power-on Refresh
Hi-Z
Bus
I/O
Reset
Standby Sleep
Setting* Release
D13
D61/IDED3
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
A12
D48/IDED13
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
D12
D59/IDED5
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
C12
D58/IDED4
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
B12
D49/IDED12
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
B11
D51/IDED10
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
A11
D50/IDED11
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
C11
D56/IDED6
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
A10
D52/IDED9
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
B10
D53/IDED8
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
D11
D57/IDED7
IO/IO
PZ
MZ/IO
IO/IO
IO/Z
MZ/IO
C10
D54/IDERST
IO/O
PZ
MZ/K
IO/O
IO/Z
MZ/O
D10
D55/DIRECTION
IO/O
PZ
MZ/K
IO/O
IO/Z
MZ/O
A7
DM
AIO
Z
Z
AIO
Z
AIO
A6
DP
AIO
Z
Z
AIO
Z
AIO
B6
VBUS
AI
AI
AI
AI
AI
AI
E8
REFRIN
AI
AI
AI
AI
AI
AI
Note: * Indicated the pin states when setting the corresponding bit in the Hi-Z register A or B
(PTHIZ_A or PTHIZ_B) in the GPIO to 1.
[Legend]
I: Input
O: Output
IO: Input/output
XI: XTAL input
XO: XTAL output
AI: Analog input
AIO: Analog input/output
Z: High impedance
PI: Input and pulled up by an on-chip resistance
PZ: High impedance and pulled up by an on-chip resistance
H: High-level output
L: Low-level output
K: The state of a pin (both input and output) before transition to refresh standby mode is
held.
Rev. 1.00 Nov. 22, 2007 Page 1673 of 1692
REJ09B0360-0100