SH7764 Datasheet, PDF (855/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 20 Ethernet Controller Direct Memory Access Controller (E-DMAC)
20.3.4 Transmit/Receive Processing of Multi-Buffer Frame (Single-Frame/
Multi-Descriptor)
(1) Multi-Buffer Frame Transmit Processing
If an error occurs during multi-buffer frame transmission, the processing shown in figure 20.6 is
carried out by the E-DMAC.
In the figure where the transmit descriptor is shown as inactive (TACT bit = 0), buffer data has
already been transmitted normally, and where the transmit descriptor is shown as active (TACT bit
= 1), buffer data has not been transmitted. If a frame transmit error occurs in the first descriptor
part where the transmit descriptor is active (TACT bit = 1), transmission is halted, and the TACT
bit cleared to 0, immediately. The next descriptor is then read, and the position within the transmit
frame is determined on the basis of bits TFP1 and TFP0 (continuing [B′00] or end [B′01]). In the
case of a continuing descriptor, the TACT bit is cleared to 0, only, and the next descriptor is read
immediately. If the descriptor is the final descriptor, not only is the TACT bit cleared to 0, but
write-back is also performed to the TFE and TFS bits at the same time. Data in the buffer is not
transmitted between the occurrence of an error and write-back to the final descriptor. If error
interrupts are enabled in the EtherC/E-DMAC status interrupt permission register (EESIPR), an
interrupt is generated immediately after the final descriptor write-back.
Descriptors
TT
AD
CL
TE
TT
FF
PP
10
Frame
Type
0 0 1 0 Start
0 0 0 0 Continue
00
E-DMAC
Inactivates TACT (change 1 to 0)
Descriptor read
Inactivates TACT
Descriptor read
Inactivates TACT
Descriptor read
Inactivates TACT
Descriptor read
10
10
10
10
10
Inactivates TACT and writes TFE, TFS _{1 1}
0 0 Continue
0 0 Continue
0 0 Continue
0 0 Continue
0 0 Continue
0 1 End
1 0 Start
Untransmitted
data is not
transmitted
after error
occurrence.
Descriptor is
only processed.
Transmit error
occurrence
One frame
Buffer length set
by descriptor
Figure 20.6 E-DMAC Operation after Transmit Error
Transmitted data
Untransmitted data
Rev. 1.00 Nov. 22, 2007 Page 799 of 1692
REJ09B0360-0100