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SH7764 Datasheet, PDF (1483/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series
Section 29 Watchdog Timer and Reset
29.2 Input/Output Pins
Table 29.1 shows the pin configuration of the WDT.
Table 29.1 Pin Configuration
Pin name
PRESET
STATUS1
STATUS0
Function
I/O
Description
Reset
Input Power-on reset
Processing state 1 Output Indicate the processor's operating status
Processing state 0
STATUS1 STATUS0 Operating Status
High
High
Low
High
Low
High
Reset
Sleep mode
Refresh standby mode
Low
Low
Normal operation
Pins for STATUS1 and STATUS0 are multiplexed to
each other function independently.
WDTOVF
Watchdog timer
overflow
Output Counter overflow signal output in the watchdog timer
mode.
Rev. 1.00 Nov. 22, 2007 Page 1427 of 1692
REJ09B0360-0100