SH7764 Datasheet, PDF (1239/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

(d) Example
Display list area
Register setting
command
Drawing starts
Drawing command
:
:
Drawing command
Drawing command
TRAP command
Drawing stops
Section 23 G2D
TRA bit in status register (SR)
is set to 1.
If TRE = 1 at this time,
an interrupt is generated externally.
Rev. 1.00 Nov. 22, 2007 Page 1183 of 1692
REJ09B0360-0100