SH7764 Datasheet, PDF (305/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 10 Clock Pulse Generator (CPG)
10.3 Clock Operating Mode
Table 10.2 shows the relationship between the mode control pin (MODE0, MODE1, and MODE2)
combinations and the clock operating mode after a power-on reset.
Table 10.2 Clock Operating Modes
Clock
operating
External pin
combination*¹
mode
MODE2 MODE1 MODE0
PLL1
PLL2
EXTAL
frequency
(MHz)
Clock generated by CPG
Initial value
Ick SHck Bck Pck of FRQCR
2
0
1
0
ON ON 25 to 33.1 Frequency 10 10/3 10/3 10/6 H'30320044
15 to 32.4 ^ratio*2
Max.
324 108 108 54
frequency
3
0
1
1
ON ON 25 only
Frequency 12 4
4
2
H'40320044
12.5 to 27 ^ratio*2
Max.
324 108 108 54
frequency
Notes: 1. Mode pin (MODE0, MODE1, and MODE2) combinations other than above are
prohibited.
2. The ratio of the frequency of each clock to that of the crystal oscillator or the clock input
from the EXTAL pin.
Rev. 1.00 Nov. 22, 2007 Page 249 of 1692
REJ09B0360-0100