SH7764 Datasheet, PDF (369/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 11 Memory Controller Unit (MCU)
Table 11.14 32-Bit External Device/Little-Endian Access and Data Alignment
(Areas 1 and 2)
D63 to D55 to D47 to D39 to D31 to D23 to D15 to D7 to
D56 D48 D40 D32 D24 D16 D8
D0
Byte access at address 0
Data
7 to 0
Byte access at address 1
Data
7 to 0
Byte access at address 2
Data
7 to 0
Byte access at address 3
Data
7 to 0
Byte access at address 4
Data
7 to 0
Byte access at address 5
Data
7 to 0
Byte access at address 6
Data
7 to 0
Byte access at address 7
Data
7 to 0
Word access at address 0
Data Data
15 to 8 7 to 0
Word access at address 2
Data Data
15 to 8 7 to 0
Word access at address 4
Data Data
15 to 8 7 to 0
Word access at address 6
Data Data
15 to 8 7 to 0
Longword access at
address 0
Data Data Data Data
31 to 24 23 to 16 15 to 8 7 to 0
Longword access at
address 4
Data Data Data Data
31 to 24 23 to 16 15 to 8 7 to 0
Quadword access at
address 0
(first time: address 0)
Data Data Data Data
31 to 24 23 to 16 15 to 8 7 to 0
Quadword access at
address 4
(second time: address 4)
Data Data Data Data
63 to 56 55 to 48 47 to 40 39 to 32
Rev. 1.00 Nov. 22, 2007 Page 313 of 1692
REJ09B0360-0100