SH7764 Datasheet, PDF (780/1752 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperHTM RISC Engine Family SH-4A Series

Section 19 Ethernet Controller (EtherC)
19.3.16 Too-Long Frame Receive Counter Register (TLFRCR)
TLFRCR is a 32-bit counter that indicates the number of frames received with a length exceeding
the value specified by the receive frame length register (RFLR). When the value in this register
reaches H'FFFFFFFF, count-up is halted. This register is not incremented when a frame containing
residual bits is received. In this case, the reception of the frame is indicated in the residual-bit
frame receive counter register (RFCR). The counter value is cleared to 0 by a write to this register
with any value.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
TLFC[31:16]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
TLFC[15:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
31 to 0 TLFC[31:0] All 0 R/W Too-Long Frame Receive Count
These bits indicate the number of frames received with
a length exceeding the value in RFLR.
Rev. 1.00 Nov. 22, 2007 Page 724 of 1692
REJ09B0360-0100